? semiconductor components industries, llc, 2013 august, 2013 ? rev. 13 1 publication order number: nlasb3157/d nlasb3157 spdt, 3 r on switch the nlasb3157 is an advanced cmos analog switch fabricated with silicon gate cmos technology. it achieves very low propagation delay and rds on resistances while maintaining cmos low power dissipation. analog and digital voltages that may vary across the full power ? supply range (from v cc to gnd). this device is a drop in replacement for the nc7sb3157. the select pin has overvoltage protection that allows voltages above v cc, up to 7.0 v to be present on the pin without damage or disruption of operation of the part, regardless of the operating voltage. features ? high speed: t pd = 1.0 ns (typ) at v cc = 5.0 v ? low power dissipation: i cc = 2.0 a (max) at t a = 25 c ? standard cmos logic levels ? high bandwidth, improved linearity ? switches standard ntsc/pal video, audio, spdif and hdtv ? may be used for clock switching, data multiplexing, etc. ? r on typical = 3 @ v cc = 4.5 v ? break before make circuitry, prevents inadvertent shorts ? 2 devices can switch balanced signal pairs, e.g. lvds 200 mb/s ? latchup performance exceeds 300 ma ? pin for pin drop in for nc7sb3157 ? tiny sc88 and wdfn6 packages ? esd performance: ? human body model; 2000 v; ? machine model; 200 v ? nlvasb3157 features extended automotive temperature range; ? 55 c to +125 c (see appendix a) ? pb ? free packages are available sc ? 88 df suffix case 419b 1 6 device package shipping ? ordering information nlasb3157dft2 sc ? 88 3000 / tape & reel http://onsemi.com marking diagrams af m af, f = specific device code m = date code* = pb ? free package l h function table select input function b0 connected to a b1 connected to a ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd801 1/d. nlasb3157dft2g sc ? 88 (pb ? free) 3000 / tape & reel wdfn6 mt suffix case 506as f m nlasb3157mtr2g wdfn6 (pb ? free) 3000 / tape & reel *date code orientation may vary depending upon manufacturing location. (note: microdot may be in either location) nlvasb3157dft2 sc ? 88 3000 / tape & reel NLVASB3157DFT2G sc ? 88 (pb ? free) 3000 / tape & reel
nlasb3157 http://onsemi.com 2 sc ? 88 wdfn6 (top view) (top view) b 1 gnd b 0 4 3 5 2 6 1 v cc select a figure 1. pin assignment & logic diagram select b 1 gnd a b 0 1 2 3 6 4 v cc 5 maximum ratings rating symbol value unit supply v oltage v cc ? 0.5 to +7.0 v dc switch v oltage (note 1) v is ? 0.5 to v cc + 0.5 v dc input voltage (note 1) v in ? 0.5 to + 7.0 v dc input diode current @ v in 0 v i ik ? 50 ma dc output current i out 128 ma dc v cc or ground current i cc /i gnd +100 ma storage temperature range t stg ? 65 to +150 c junction temperature under bias t j 150 c junction lead temperature (soldering, 10 seconds) t l 260 c power dissipation @ +85 c p d 180 mw stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. the input and output negative voltage ratings may be exceeded if the input and output diode current ratings are observed. recommended opera ting conditions (note 2) characteristic symbol min max unit supply voltage operating v cc 1.65 5.5 v select input voltage v in 0 5.5 v switch input voltage v is 0 v cc v output v oltage v out 0 v cc v operating t emperature t a ? 55 +125 c input rise and fall time control input v cc = 2.3 v ? 3.6 v control input v cc = 4.5 v ? 5.5 v t r , t f 0 0 10 5.0 ns/v thermal resistance ja ? 350 c/w 2. select input must be held high or low, it must not float.
nlasb3157 http://onsemi.com 3 dc electrical characteristics ? nlasb3157 symbol parameter test conditions v cc (v) t a = +25 c t a = ? 40 c to +85 c unit min typ max min max v ih high level input v oltage 1.65 ? 1.95 2.3 ? 5.5 0.75 v cc 0.7 v cc v v il low level input v oltage 1.65 ? 1.95 2.3 ? 5.5 0.25 v cc 0.3 v cc v i in input leakage current 0 v in 5.5 v 0 ? 5.5 0.05 0.1 1 a i off off state leakage current 0 a, b v cc 1.65 ? 5.5 0.05 0.1 1 a r on switch on resistance (note 3) v in = 0 v, i o = 30 ma v in = 2.4 v, i o = ? 30 ma v in = 4.5 v, i o = ? 30 ma 4.5 3.0 5.0 7.0 7.0 12 15 v in = 0 v, i o = 24 ma v in = 3 v, i o = ? 24 ma 3.0 4.0 10 9.0 20 v in = 0 v, i o = 8 ma v in = 2.3 v, i o = ? 8 ma 2.3 5.0 13 12 30 v in = 0 v, i o = 4 ma v in = 1.65 v, i o = ? 4 ma 1.65 6.5 17 20 50 i cc quiescent supply current all channels on or off v in = v cc or gnd i out = 0 5.5 1.0 10 a analog signal range v cc 0 v cc 0 v cc v r range on resistance over signal range (note 3) (note 7) i a = ? 30 ma, 0 v bn v cc i a = ? 24 ma, 0 v bn v cc i a = ? 8 ma, 0 v bn v cc i a = ? 4 ma, 0 v bn v cc 4.5 3.0 2.3 1.65 25 50 100 300 r on on resistance match between channels (note 3) (note 4) (note 5) i a = ? 30 ma, v bn = 3.15 i a = ? 24 ma, v bn = 2.1 i a = ? 8 ma, v bn = 1.6 i a = ? 4 ma, v bn = 1.15 4.5 3.0 2.3 1.65 0.15 0.2 0.5 0.5 r flat on resistance flatness (note 3) (note 4) (note 6) i a = ? 30 ma, 0 v bn v cc i a = ? 24 ma, 0 v bn v cc i a = ? 8 ma, 0 v bn v cc i a = ? 4 ma, 0 v bn v cc 5.0 3.3 2.5 1.8 6.0 12 28 125 3. measured by the voltage drop between a and b pins at the indicated current through the switch. on resistance is determined by the lower of the voltages on the two (a or b ports). 4. parameter is characterized but not tested in production. 5. r on = r on max ? r on min measured at identical v cc , temperature and voltage levels. 6. flatness is defined as the difference between the maximum and minimum value of on resistance over the specified range of cond itions. 7. guaranteed by design.
nlasb3157 http://onsemi.com 4 ac electrical characteristics ? nlasb3157 symbol parameter test conditions v cc (v) t a = +25 c t a = ? 40 c to +85 c unit figure number min typ max min max t phl t plh propagation delay bus to bus (note 9) v i = open 1.65 ? 1.95 2.3 ? 2.7 3.0 ? 3.6 4.5 ? 5.5 1.2 0.8 0.3 ns figures 2, 3 t pzl t pzh output enable time turn on time (a to b n ) v i = 2 v cc for t pzl v i = 0 v for t pzh 1.65 ? 1.95 2.3 ? 2.7 3.0 ? 3.6 4.5 ? 5.5 23 13 6.9 5.2 7.0 3.5 2.5 1.7 24 14 7.6 5.7 ns figures 2, 3 t plz t phz output disable time turn off time (a port to b port) v i = 2 v cc for t plz v i = 0 v for t phz 1.65 ? 1.95 2.3 ? 2.7 3.0 ? 3.6 4.5 ? 5.5 12.5 7.0 5.0 3.5 3.0 2.0 1.5 0.8 13 7.5 5.3 3.8 ns figures 2, 3 t b ? m break before make time (note 8) 1.65 ? 1.95 2.3 ? 2.7 3.0 ? 3.6 4.5 ? 5.5 0.5 0.5 0.5 0.5 ns figure 4 q charge injection (note 8) c l = 0.1 nf, v gen = 0 v r gen = 0 5.0 3.3 7.0 3.0 pc figure 5 oirr off isolation (note 10) r l = 50 f = 10 mhz 1.65 ? 5.5 ? 57 db figure 6 xtalk crosstalk r l = 50 f = 10 mhz 1.65 ? 5.5 ? 54 db figure 7 bw ? 3 db bandwidth r l = 50 1.65 ? 5.5 250 mhz figure 10 thd total harmonic distortion (note 8) r l = 600 0.5 v p ? p f = 600 hz to 20 khz 5.0 0.011 % capacitance ? nlasb3157 (note 11) symbol parameter test conditions typ max unit figure number c in select pin input capacitance v cc = 0 v 2.3 pf c io ? b b port off capacitance v cc = 5.0 v 6.5 pf figure 8 c ioa ? on a port capacitance when switch is enabled v cc = 5.0 v 18.5 pf figure 9 8. guaranteed by design. 9. this parameter is guaranteed by design but not tested. the bus switch contributes no propagation delay other than the rc dela y of the on resistance of the switch and the 50 pf load capacitance, when driven by an ideal voltage source (zero output impedance). 10. off isolation = 20 log 10 [v a /v bn ]. 11. t a = +25 c, f = 1 mhz, capacitance is characterized but not tested in production.
nlasb3157 http://onsemi.com 5 appendix a dc electrical extended automotive temperature range characteristics ? nlvasb3157 symbol parameter test conditions v cc (v) t a = +25 c t a = ? 55 c to +125 c unit min typ max min max v ih high level input v oltage 1.65 ? 1.95 2.3 ? 5.5 0.75 v cc 0.7 v cc v v il low level input v oltage 1.65 ? 1.95 2.3 ? 5.5 0.25 v cc 0.3 v cc v i in input leakage current 0 v in 5.5 v 0 ? 5.5 0.05 0.1 1 a i off off state leakage current 0 a, b v cc 1.65 ? 5.5 0.05 0.1 1 a r on switch on resistance (note 12) v in = 0 v, i o = 30 ma v in = 2.4 v, i o = ? 30 ma v in = 4.5 v, i o = ? 30 ma 4.5 3.0 5.0 7.0 8.5 13.0 15.0 v in = 0 v, i o = 24 ma v in = 3 v, i o = ? 24 ma 3.0 4.0 10 11 20 v in = 0 v, i o = 8 ma v in = 2.3 v, i o = ? 8 ma 2.3 5.0 13 12 30 v in = 0 v, i o = 4 ma v in = 1.65 v, i o = ? 4 ma 1.65 6.5 17 20 50 i cc quiescent supply current all channels on or off v in = v cc or gnd i out = 0 5.5 1.0 10 a analog signal range v cc 0 v cc 0 v cc v r range on resistance over signal range (note 12) (note 14) i a = ? 30 ma, 0 v bn v cc i a = ? 24 ma, 0 v bn v cc i a = ? 8 ma, 0 v bn v cc i a = ? 4 ma, 0 v bn v cc 4.5 3.0 2.3 1.65 25 50 100 300 12. measured by the voltage drop between a and b pins at the indicated current through the switch. on resistance is determined b y the lower of the voltages on the two (a or b ports). 13. flatness is defined as the difference between the maximum and minimum value of on resistance over the specified range of con ditions. 14. guaranteed by design. * for r on , r flat , q, oirr, xtalk, bw, thd, and cin see ? 40 c to 85 c section.
nlasb3157 http://onsemi.com 6 appendix a ac electrical extended automotive temperature range characteristics ? nlvasb3157 symbol parameter test conditions v cc (v) t a = +25 c t a = ? 55 c to +125 c unit figure number min typ max min max t phl t plh propagation delay bus to bus (note 16) v i = open 1.65 ? 1.95 2.3 ? 2.7 3.0 ? 3.6 4.5 ? 5.5 1.2 0.8 0.3 ns figures 2, 3 t pzl t pzh output enable time turn on time (a to b n ) v i = 2 v cc for t pzl v i = 0 v for t pzh 1.65 ? 1.95 2.3 ? 2.7 3.0 ? 3.6 4.5 ? 5.5 23 13 6.9 5.2 7.0 3.5 2.5 1.7 24 14 9.0 7.0 ns figures 2, 3 t plz t phz output disable time turn off time (a port to b port) v i = 2 v cc for t plz v i = 0 v for t phz 1.65 ? 1.95 2.3 ? 2.7 3.0 ? 3.6 4.5 ? 5.5 12.5 7.0 5.0 3.5 3.0 2.0 1.5 0.8 13 7.5 6.5 5.0 ns figures 2, 3 t b ? m break before make time (note 15) 1.65 ? 1.95 2.3 ? 2.7 3.0 ? 3.6 4.5 ? 5.5 0.5 0.5 0.5 0.5 ns figure 4 15. guaranteed by design. 16. this parameter is guaranteed by design but not tested. the bus switch contributes no propagation delay other than the rc del ay of the on resistance of the switch and the 50 pf load capacitance, when driven by an ideal voltage source (zero output impedance). * for r on , r flat , q, oirr, xtalk, bw, thd, and cin see ? 40 c to 85 c section.
nlasb3157 http://onsemi.com 7 t w v cc gnd v oh v ol 50% 10% 10% 50% 50% 90% 90% t f = 2.5 ns t r = 2.5 ns switch input output 50% t phl t plh v cc gnd v tri 50% 10% 10% 50% 50% 90% 90% t f = 2.5 ns t r = 2.5 ns select input output t pzl v tri output 50% t pzh v ol v oh t phz t plz v ol + 0.3 v v oh ? 0.3 v note: input driven by 50 source terminated in 50 note: c l includes load and stray capacitance note: input prr = 1.0 mhz; t w = 500 ns v i rd ru c l from output under test figure 2. ac test circuit figure 3. ac waveforms figure 4. break before make interval timing logic input v out t d 0.9 v out r l c l v out v in logic input a s b 0 b 1 ac loading and waveforms
nlasb3157 http://onsemi.com 8 figure 5. charge injection test r l 1 m c l 100 pf v out logic input a s b n r gen v ge q = ( v out )(c l ) v out on off off v out logic input figure 6. off isolation figure 7. crosstalk s b n logic input 0 v or v ih 10 nf v cc analyzer a gnd 50 50 s b 0 10 nf v cc analyzer a gnd 50 signal generator 0 dbm 50 b 1 figure 8. channel off capacitance figure 9. channel on capacitance figure 10. bandwidth s b n 10 nf v cc a gnd signal generator 0 dbm 50 logic input 0 v or v cc s b n logic input 0 v or v cc 10 nf v cc a gnd capacitance meter s b n logic input 0 v or v cc 10 nf v cc a gnd capacitance meter f = 1 mhz f = 1 mhz ac loading and waveforms
nlasb3157 http://onsemi.com 9 package dimensions sc ? 88/sot ? 363/sc ? 70 df suffix case 419b ? 02 issue y notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimensions d and e1 do not include mold flash, pro- trusions, or gate burrs. mold flash, protrusions, or gate burrs shall not exceed 0.20 per end. 4. dimensions d and e1 at the outermost extremes of the plastic body and datum h. 5. datums a and b are determined at datum h. 6. dimensions b and c apply to the flat section of the lead between 0.08 and 0.15 from the tip. 7. dimension b does not include dambar protrusion. allowable dambar protrusion shall be 0.08 total in excess of dimension b at maximum material condi- tion. the dambar cannot be located on the lower radius of the foot. c ddd m 123 a1 a c 654 e b 6x dim min nom max millimeters a ??? ??? 1.10 a1 0.00 ??? 0.10 ddd b 0.15 0.20 0.25 c 0.08 0.15 0.22 d 1.80 2.00 2.20 ??? ??? 0.043 0.000 ??? 0.004 0.006 0.008 0.010 0.003 0.006 0.009 0.070 0.078 0.086 min nom max inches 0.10 0.004 e1 1.15 1.25 1.35 e 0.65 bsc l 0.26 0.36 0.46 2.00 2.10 2.20 0.045 0.049 0.053 0.026 bsc 0.010 0.014 0.018 0.078 0.082 0.086 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. soldering footprint* 0.65 0.66 6x dimensions: millimeters 0.30 pitch 2.50 6x recommended top view side view end view bbb h b seating plane detail a e a2 0.70 0.90 1.00 0.027 0.035 0.039 l2 0.15 bsc 0.006 bsc aaa 0.15 0.006 bbb 0.30 0.012 ccc 0.10 0.004 a-b d aaa c 2x 3 tips d e1 d e a 2x aaa h d 2x d l plane detail a h gage l2 c ccc c a2 6x
nlasb3157 http://onsemi.com 10 package dimensions notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.25 and 0.30mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. c a seating plane d b e 0.10 c a3 a a1 2x 2x 0.10 c wdfn6 1.2x1.0, 0.4p case 506as issue d dim a min max millimeters 0.70 0.80 a1 0.00 0.05 a3 0.20 ref b 0.15 0.25 d e e l pin one reference 0.08 c 0.10 c 7x a 0.10 c note 3 l2 e b b 3 6 6x 1 4 0.05 c 4x mounting footprint* l1 1.20 bsc 1.00 bsc 0.40 bsc 0.30 0.40 0.00 0.15 bottom view l 5x dimensions: millimeters 0.22 6x 0.42 6x 1.07 0.40 pitch *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting t echniques reference manual, solderrm/d. l1 detail a l alternate terminal constructions ??? l2 0.40 0.50 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc owns the rights to a numb er of patents, trademarks, copyrights, trade secrets, and other intellectual property. a listing of scillc?s product/patent coverage may be accessed at ww w.onsemi.com/site/pdf/patent ? marking.pdf. sc illc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circui t, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data she ets and/or specifications can and do vary in different applications and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for e ach customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designe d, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any o ther application in which the failure of the scillc product could create a situation where personal injury or death may occur. should buyer purchase or use scillc products for any such u nintended or unauthorized application, buyer shall indemnify and hold scillc and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthori zed use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this l iterature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 nlasb3157/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your loc a sales representative
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